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PA28F400B5T80

Specifications

SKU: 475726

BUY PA28F400B5T80 https://www.utsource.net/itm/p/475726.html
SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT

Below is the parameter table and instructions for the PA28F400B5T80, a 3.3V 512K x 8-Bit Parallel Flash Memory.

PA28F400B5T80 Parameter Table

Parameter Symbol Min Typ Max Unit
Supply Voltage VCC 3.0 3.3 3.6 V
Standby Current ICC(SB) - 5 10 μA
Active Current (Read) ICC(READ) 5 10 20 mA
Access Time tACC 55 70 90 ns
Output Enable Time tOE 0 10 20 ns
Write Enable Time tWE 0 10 20 ns
Data Hold Time tDH 0 5 10 ns
Address Setup Time tAS 10 15 20 ns
Address Hold Time tAH 0 5 10 ns
Chip Enable Time tCE 0 10 20 ns
Write Protect Time tWP 0 10 20 ns
Block Erase Time tBERS 200 300 400 ms
Chip Erase Time tCERS 5000 7000 9000 ms
Program Time tPROG 200 300 400 μs

Instructions for PA28F400B5T80

1. Power Supply and Grounding

  • VCC: Connect to a stable 3.3V power supply.
  • GND: Ensure a good ground connection to avoid noise and ensure reliable operation.

2. Pin Configuration

  • A0-A18: Address lines (19 bits for 512K x 8 configuration).
  • DQ0-DQ7: Data I/O lines (8 bits).
  • CE: Chip Enable (active low).
  • OE: Output Enable (active low).
  • WE: Write Enable (active low).
  • WP: Write Protect (active low).

3. Read Operation

  1. Set CE low to enable the chip.
  2. Apply the desired address to the A0-A18 lines.
  3. Set OE low to enable data output.
  4. Data will be available on DQ0-DQ7 after the access time (tACC).
  5. Set OE high to disable data output.

4. Write Operation

  1. Set CE low to enable the chip.
  2. Apply the desired address to the A0-A18 lines.
  3. Set WE low to initiate the write cycle.
  4. Apply the data to be written to DQ0-DQ7.
  5. Set WE high to complete the write cycle.
  6. Wait for the program time (tPROG) before performing another operation.

5. Erase Operations

  • Block Erase:

    1. Set CE low to enable the chip.
    2. Apply the block address to the A0-A18 lines.
    3. Set WE low to initiate the erase cycle.
    4. Set WE high to complete the erase cycle.
    5. Wait for the block erase time (tBERS) before performing another operation.
  • Chip Erase:

    1. Set CE low to enable the chip.
    2. Set WE low to initiate the erase cycle.
    3. Set WE high to complete the erase cycle.
    4. Wait for the chip erase time (tCERS) before performing another operation.

6. Write Protect

  • Set WP high to prevent any write or erase operations. Setting WP low allows write and erase operations.

7. Timing Considerations

  • Ensure all timing parameters (tACC, tOE, tWE, tDH, tAS, tAH, tCE, tWP) are met to avoid data corruption or operational issues.

8. Storage and Handling

  • Store the device in a dry, static-free environment.
  • Handle with care to avoid damage to the pins and internal components.

Note:

  • Always refer to the datasheet for the most accurate and detailed information.
  • Ensure that the device is used within its specified operating conditions to avoid damage or reduced performance.
(For reference only)

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