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AD2S80AJD

Specifications

SKU: 733915

BUY AD2S80AJD https://www.utsource.net/itm/p/733915.html
Variable Resolution, Monolithic Resolver-to-Digital Converter
Parameter Symbol Min Typical Max Unit
Supply Voltage VDD 4.75 5.0 5.25 V
Operating Temperature Toper -40 - 105 °C
Storage Temperature Tstg -65 - 150 °C
Resolution 10 12, 14 16 bits
Conversion Time (16-bit) tconv - 160 - μs
Input Frequency Range fin 0 - 200 kHz
Output Data Rate fODR 0 - 200 kHz
Differential Linearity Error DNL -1 - 1 LSB
Integral Linearity Error INL -1 - 1 LSB
Power Consumption Pdiss - 150 - mW
Input Impedance Zin 10 - 20
Output Impedance Zout 0.1 - 0.5

Instructions for Using AD2S80AJD

  1. Power Supply:

    • Connect the VDD pin to a 5V supply within the range of 4.75V to 5.25V.
    • Ensure the power supply is stable and has adequate decoupling capacitors (typically 10μF and 0.1μF) placed close to the VDD and GND pins.
  2. Input Signal:

    • The input signal should be a differential sine/cosine pair with a frequency range of 0 to 200kHz.
    • The input impedance is between 10kΩ and 20kΩ, so ensure the source impedance is compatible to avoid loading issues.
  3. Output Configuration:

    • The output data rate can be configured up to 200kHz.
    • The resolution can be set to 10, 12, 14, or 16 bits using the appropriate control lines.
  4. Conversion Time:

    • For 16-bit resolution, the typical conversion time is 160μs.
    • Ensure that the system allows sufficient time for the conversion to complete before reading the data.
  5. Temperature Considerations:

    • The operating temperature range is from -40°C to 105°C.
    • The storage temperature range is from -65°C to 150°C.
  6. Linearity:

    • The differential linearity error (DNL) and integral linearity error (INL) are both ±1 LSB, ensuring high accuracy in the conversion process.
  7. Power Consumption:

    • The typical power consumption is 150mW. Ensure the power supply can handle this load.
  8. Output Data Handling:

    • The output impedance is between 0.1kΩ and 0.5kΩ. Use appropriate buffering if connecting to high-impedance loads.
  9. Decoupling Capacitors:

    • Place decoupling capacitors as close as possible to the VDD and GND pins to minimize noise and ensure stable operation.
  10. Reference Manual:

    • Refer to the AD2S80AJD datasheet for detailed specifications, timing diagrams, and application notes.
(For reference only)

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