BUY SN74LS42N https://www.utsource.net/itm/p/1211488.html
These monolithic BCD-to-decimal decoders consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all outputs remain off for all invalid input conditions. The '42A and 'LS42 feature inputs and outputs that are compatible for use with most TTL and other saturated low-level logic circuits. DC noise margins are typically one volt. The SN5442A and SN54LS42 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7442A and SN74LS42 are characterized for operation from 0°C to 70°C.
Description: Quadruple 2-Input Positive-NAND Gates Features: Inputs Include Clamp Diodes Outputs Source/Sink 24 mA Fanout of 10 LSTTL Loads Low Power Consumption, 80-μA Max Icc Balanced Propagation Delays Commonly Used as Buffer, Line Driver, or Line Receiver 5-V, 10-V, and 15-V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of B Series CMOS Devices” ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Applications: Interface to 5-V TTL Systems High-Speed Line Drivers High-Speed Clock Drivers High-Speed Line Receivers High-Speed Clock Receivers High-Speed Data Buffers High-Speed Address Buffers (For reference only)