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Smart High-Side Power Switch PROFET Two Channels, 60 m? 1 BTS52 35L Datasheets Search Partnumber : Start with "BTS52 35L " - Total : 23 ( 1/1 Page) NO Part no Electronics Description View Electronic Manufacturer 23 BTS5210G Smart High-Side Power Switch Two Channels: 2 x 140m? Status Feedback

Parameter	Symbol	Min	Typ	Max	Unit	Conditions
Continuous Drain Current	ID	-	100	-	A	Tc = 25°C, VGS = 10V
Pulse Drain Current	ID(Pulse)	-	150	-	A	Tc = 25°C, t = 10ms, Duty Cycle = 1%
Gate-Source Voltage	VGS	-18	-	18	V	-
Drain-Source Breakdown Voltage	BVDSS	45	-	-	V	-
Gate-Source Leakage Current	IGSS	-1	-	1	μA	VGS = ±18V, Tj = 25°C
Drain-Source On-State Resistance	RDS(on)	-	3.5	-	mΩ	VGS = 10V, ID = 100A, Tj = 25°C
Thermal Resistance, Junction to Case	Rth(j-c)	-	0.6	-	K/W	-
Maximum Junction Temperature	Tj(max)	-	-	175	°C	-
Storage Temperature Range	Tstg	-40	-	150	°C	-

Instructions for Use:

1. Power Supply and Grounding:

   • Ensure that the power supply and ground connections are secure and capable of handling the maximum current specified.
   • Use appropriate decoupling capacitors near the power pins to minimize noise and ensure stable operation.

2. Gate Drive:

   • The gate-source voltage (VGS) should be within the specified range (-18V to +18V).
   • Use a gate resistor to control the switching speed and reduce electromagnetic interference (EMI).

3. Heat Management:

   • The device can dissipate significant power during operation. Ensure adequate heat sinking to keep the junction temperature below the maximum rating (175°C).
   • Calculate the power dissipation (Pd) using the formula: Pd = ID^2 * RDS(on).

4. Overcurrent Protection:

   • Implement overcurrent protection circuits to prevent damage from excessive current.
   • Monitor the drain current (ID) and limit it to the continuous or pulse ratings as specified.

5. Storage and Handling:

   • Store the device in a dry environment within the storage temperature range (-40°C to 150°C).
   • Handle the device with care to avoid static discharge, which can damage the sensitive gate oxide.

6. PCB Layout:

   • Design the PCB layout to minimize inductance in the high-current paths.
   • Place the device close to the load to reduce parasitic inductance and resistance.

7. Testing:

   • Before finalizing the design, perform thorough testing under various operating conditions to ensure reliability and performance.
   • Verify that all parameters, including thermal management and electrical characteristics, meet the application requirements.

(For reference only)