BUY 74HC125N,652 https://www.utsource.net/itm/p/7540943.html
Buffer, Non-Inverting 4 Element 1 Bit per Element Push-Pull Output 14-DIP
Description: The 74HC125N is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). Features: High speed: tpd = 8.5 ns (typ.) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25 °C High noise immunity: VNIH = VNIL = 28 % VCC (min) Balanced propagation delays: tPLH tPHL Symmetrical output impedance: |IOH| = IOL (max) Wide operating voltage range: VCC (opr) = 2 V to 6 V Low input current: II = 1 μA (max) Pin and function compatible with 74LS125 Application: Bus-oriented systems High-speed line drivers High-speed line receivers High-speed clock drivers High-speed clock receivers High-speed data buffers (For reference only)