BUY NT5CB64M16FP-DII https://www.utsource.net/itm/p/8945203.html

Description: NANYA 64M x 16 DDR2 SDRAM Feature: 64M x 16 bits organization Double Data Rate architecture Differential Clock Input (CK and CK#) 4 internal banks for concurrent operation Programmable CAS Latency: 3, 4, 5 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock Programmable Burst Length: 4 or 8 Bi-directional Differential Data Strobe Internal(self) calibration through ZQ pin On Die Termination using ODT pin Average Refresh Period 7.8 us at lower than TCASE 85°C Asynchronous Reset VDD = 1.8V ± 0.1V Power Supply VDDQ = 1.8V ± 0.1V Power Supply VPP - 2.5V for Write Operation 8-bit pre-fetch Fly-by topology Fully synchronous; all signals registered on positive edge of system clock 100-pin FBGA package Application: Desktop PCs Notebook PCs Servers Networking and Communication Equipment (For reference only)