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EP1C6T144I7N

Specifications

SKU: 11755223

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Parameter Description Value
Device Device Name EP1C6T144I7N
Family FPGA Family Cyclone I
Package Package Type TQFP-144
Speed Grade Speed Grade -7
I/O Banks Number of I/O Banks 8
I/O Pins Total Number of I/O Pins 108
Logic Cells Number of Logic Cells 6,225
Embedded Multipliers Number of Embedded Multipliers 24
RAM Blocks Number of RAM Blocks 64 kbits
PLLs Number of Phase-Locked Loops (PLLs) 2
Operating Voltage Supply Voltage Range 3.3V ± 5%
Configuration Modes Configuration Modes AS, JTAG, PS, USB-Blaster
Configuration Memory Configuration Memory Type Non-Volatile Flash
Configuration Time Typical Configuration Time 9 ms
Temperature Range Operating Temperature Range -40°C to +85°C
Power Consumption Static Power Consumption (typical) 150 mW
Dynamic Power Dynamic Power Consumption (typical) 1.5 W
Clock Frequency Maximum Clock Frequency 250 MHz
Pin Pitch Pin Pitch 0.5 mm
Body Size Body Size (L x W x H) 20 mm x 20 mm x 1.4 mm

Instructions for Use

  1. Power Supply:

    • Ensure that the supply voltage is within the specified range (3.3V ± 5%).
    • Use decoupling capacitors close to the power pins to minimize noise.
  2. Configuration:

    • Use one of the supported configuration modes (AS, JTAG, PS, USB-Blaster).
    • For Active Serial (AS) mode, connect the configuration device (e.g., EPCS16) to the appropriate pins.
    • For JTAG mode, connect the JTAG interface to the JTAG pins (TDI, TDO, TCK, TMS).
  3. Programming:

    • Use Quartus II or a compatible software tool to program the device.
    • Generate the configuration file (.sof) and use the appropriate programmer to load it into the device.
  4. Clocking:

    • Connect the clock source to the dedicated clock input pins.
    • Use the PLLs to generate the required clock frequencies if needed.
  5. I/O Usage:

    • Configure the I/O banks according to the desired voltage levels and standards.
    • Use the I/O pins for data input, output, and control signals as required by your design.
  6. Thermal Management:

    • Ensure adequate cooling, especially if operating at high dynamic power consumption.
    • Consider using a heatsink if necessary.
  7. Storage and Handling:

    • Store the device in a dry, static-free environment.
    • Handle with care to avoid damage to the pins and package.
  8. Testing:

    • Perform functional testing after programming to ensure the device operates as expected.
    • Use boundary-scan testing (JTAG) to verify the integrity of the device and connections.
(For reference only)

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